LoRa is a physical-layer wireless modulation technique based on linear frequency-modulated spread spectrum. It extends communication range while retaining the low-power characteristics of traditional frequency-shift keying (FSK). By spreading the baseband signal over a wider bandwidth, it enables robust long-distance links with minimal power consumption.

LoRa Characteristics

• Range: 2–20 km; lower data rates increase distance.
• Low Power Consumption: Balances energy efficiency with coverage.
• Cost-Effective: High node capacity reduces infrastructure cost.
• High Sensitivity: Up to 8–10 dB better than FSK at same throughput.
• Advanced Modulation: Direct-sequence spread spectrum with forward error correction (FEC).
• Strong Anti-Interference: Resists co-channel and noise interference.
• Low Transmit Power Density: Minimizes impact on nearby systems.
• Security: AES-128 encryption ensures confidentiality.
• Multipath & Doppler Resilience: Performs reliably in urban environments with reflections and moving nodes.

SX1278 Overview

The IoT development board integrates an SX1278 transceiver via SPI. This half-duplex, low-IF device comprises:

• RF front-end (LNA and PA)
• Up/down conversion stages
• LoRa and FSK/OOK modem
• Data FIFO, registers, and SPI interface

Registers are accessible for reading in any mode, but writable only in sleep or standby. Transmission involves writing payload to FIFO via SPI, modulating, up-converting, and amplifying. Reception uses LNA, down-converts, demodulates, and places data into FIFO for SPI readout.

Operational Setup

Initialization requires placing the chip in sleep mode to select LoRa mode, then setting RF frequency, output power, spreading factor, bandwidth, and coding rate. Only LoRa mode and power must be explicitly set; others default.

The 256-byte FIFO can be freely assigned for transmit or receive use and is cleared automatically when entering a new receive session. Access is allowed in all modes except sleep.

Schematic Details

MCU interfaces with SX1278 using pins PA5, PA6, PA7, PA4 mapped to SPI1 alternate functions. The reset input (NRESET, active-low) connects to PA9, and digital I/O DIO0 links to PA10.

STM32CubeMX Configuration

Enable SPI1 in full-duplex master mode with hardware NSS disabled. Assign:

• PC15 as GPIO output (default high, controls LED)
• PA4 as GPIO output (sotfware chip select)
• PA9 as GPIO output (drives module reset, keep high during init)
• PA10 as GPIO input (interrupt/DIO0 observation)

Add driver files lora.h and lora.c from the resource package into the project.

Code Implementation

SPI Initialization Enhancement

void MX_SPI1_Init(void)
{
  hspi1.Instance = SPI1;
  hspi1.Init.Mode = SPI_MODE_MASTER;
  hspi1.Init.Direction = SPI_DIRECTION_2LINES;
  hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
  hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
  hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
  hspi1.Init.NSS = SPI_NSS_SOFT;
  hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
  hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
  hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
  hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
  hspi1.Init.CRCPolynomial = 7;
  if (HAL_SPI_Init(&hspi1) != HAL_OK) {
    Error_Handler();
  }
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET); // Deselect module
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_9, GPIO_PIN_SET); // Prevent unintended reset
}

SPI Register Transaction

uint8_t spi_transfer_byte(uint8_t reg_addr, uint8_t value)
{
  uint8_t tx_buf[2] = {reg_addr, value};
  uint8_t rx_buf[2] = {0};
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET);
  HAL_SPI_TransmitReceive(&hspi1, tx_buf, rx_buf, 2, 10);
  HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET);
  return rx_buf[1];
}

Node A Transmitter Logic

#include "lora.h"
#include <string.h>

uint8_t tx_buffer[10];

int main(void)
{
  HAL_Init();
  SystemClock_Config();
  MX_GPIO_Init();
  MX_SPI1_Init();
  LORA_Init();
  tx_buffer[0] = '*';
  tx_buffer[1] = 'A';
  while (1) {
    LORA_Tx(tx_buffer, 2);
    HAL_Delay(1000);
  }
}

Node B Receiver Logic

#include "lora.h"
#include <string.h>

uint8_t rx_buffer[10];

int main(void)
{
  HAL_Init();
  SystemClock_Config();
  MX_GPIO_Init();
  MX_SPI1_Init();
  LORA_Init();
  while (1) {
    if (LORA_Rx(rx_buffer) == 2) {
      if (strcmp((char*)rx_buffer, "*A") == 0) {
        HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_15);
      }
    }
  }
}

Observed Behavior

On Node B, the LED toggles every second in response to correctly received packets from Node A.

Common Pitfalls

• PA4 configuration: Must be set as GPIO output for software chip select; otherwise SPI transactions fail.
• PA9 handling: Should be initialized high to avoid triggering unwanted module resets during startup.
• PA10 setup: Required as input to monitor DIO0 status for receive indication.