The following example shows how to bring up UART1 (LPUART1) on the S32K148 from reset using nothing but the CMSIS register interface. The code is split into three parts: clock and pin setup, the receive ISR, and simple transmit helpers.

1. Clock, pin-mux and peripheral initialisation

---

void init_uart1(void)
{
    /* 1. Enable the PORTC clock */
    PCC->PCCn[PCC_PORTC_INDEX] |= PCC_PCCn_CGC_MASK;   /* Gate clock on */

    /* 2. Route PTC6 → RX, PTC7 → TX */
    PORTC->PCR6 = PORT_PCR_MUX(2);                     /* ALT2 = LPUART1_RX */
    PORTC->PCR7 = PORT_PCR_MUX(2);                     /* ALT2 = LPUART1_TX */

    /* 3. Select 8 MHz SIRC for LPUART1 */
    PCC->PCCn[PCC_LPUART1_INDEX] = 0;                 /* Disable first */
    PCC->PCCn[PCC_LPUART1_INDEX] = PCC_PCCn_PCS(2)   /* PCS = SIRC */
                                 | PCC_PCCn_CGC_MASK; /* Enable clock */

    /* 4. Disable TX/RX while we configure */
    LPUART1->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK);

    /* 5. 9600-8-N-1 with OSR = 16 */
    LPUART1->BAUD = LPUART_BAUD_OSR(15)              /* OSR = 16 */
                  | LPUART_BAUD_SBR(52);             /* 8 MHz / (52*16) ≈ 9600 */

    /* 6. Re-enable TX & RX, idle line starts at stop bit */
    LPUART1->CTRL |= LPUART_CTRL_TE_MASK
                   | LPUART_CTRL_RE_MASK
                   | LPUART_CTRL_ILT_MASK;

    /* 7. Enable RX interrupt and idle-line interrupt */
    LPUART1->CTRL |= LPUART_CTRL_RIE_MASK
                   | LPUART_CTRL_ILIE_MASK;

    /* 8. Unmask IRQ in NVIC */
    NVIC_EnableIRQ(LPUART1_RxTx_IRQn);

    /* 9. Wait until TX is actually ready */
    while (!(LPUART1->CTRL & LPUART_CTRL_TE_MASK));
}

2. Receive path – interrupt handler

---

The ISR toggles a debug LED (PTe23) each time a byte arrives, fills a circular buffer, and terminates the line on an idle-line event.

#define RX_BUF_LEN 128
static volatile uint8_t  rxBuf[RX_BUF_LEN];
static volatile uint16_t rxHead = 0;

void LPUART1_RxTx_IRQHandler(void)
{
    uint32_t status = LPUART1->STAT;

    /* Clear RDRF flag */
    if (status & LPUART_STAT_RDRF_MASK)
    {
        uint8_t byte = LPUART1->DATA & 0xFF;

        rxBuf[rxHead] = byte;
        rxHead = (rxHead + 1) % RX_BUF_LEN;
    }

    /* Clear IDLE flag */
    if (status & LPUART_STAT_IDLE_MASK)
    {
        LPUART1->STAT |= LPUART_STAT_IDLE_MASK;   /* W1C */
        /* Optional: signal application that a line is complete */
    }
}

3. Trnasmit helpers

---

void uart1_putc(uint8_t ch)
{
    while (!(LPUART1->STAT & LPUART_STAT_TDRE_MASK)); /* Wait for TX buffer empty */
    LPUART1->DATA = ch;
}

void uart1_write(const uint8_t *src, uint16_t len)
{
    while (len--)
        uart1_putc(*src++);
}