Creating a new CCS6.0 project for TMS320F2812 requires several configuration steps. This guide walks through the complete setup process, from project creation to successful compilation.

Project Configuration

Open CCS6.0 and navigate to Project → New CCS Project. Configure the following settings:

• Target: TMS320F2812
• Connection: Select your emulator (XDS100v2 or equivalant)
• Output Type: Executable
• Compiler: C6000

Click Finish to generate the project skeleton.

Project Structure

After project creation, add the necessary source and header files. Organize the project directory with separate header and source folders:

project/
├── header/
│   ├── DSP28_Device.h
│   └── other_headers.h
├── source/
│   ├── DSP28_GlobalVariableDefs.c
│   └── other_sources.c
└── main.c

Configure include paths: Project → Properties → Build → C6000 Compiler → Include Options, and add the header directory path.

Main Applicasion Code

#include "DSP28_Device.h"
#include <stdio.h>

void main(void)
{
    /* System initialization */
    InitSysCtrl();

    /* Disable interrupts */
    DINT;
    IER = 0x0000;
    IFR = 0x0000;

    /* Initialize PIE block */
    InitPieCtrl();

    /* Initialize PIE interrupt vector table */
    InitPieVectTable();

    printf("Hello DSP !");

    while(1);
}

Compilation Troubleshooting

printf Support Issue

Initial compilation produces errors related to printf function implementation. The standard printf library generates excessive code overhead, exceeding available memory on the F2812 device.

Solution: Navigate to Project → Properties → Build → Advanced Options → Library Funciton Assumptions. Set Level of printf/scanf support required to minimal.

Peripheral Section Allocation

Remaining warnings indicate unassigned peripheral register sections. These must be properly mapped in the linker command file.

CMD File Configuration

The linker command file defines memory layout and section assignments. Below is a corrected configuration:

MEMORY
{
    PAGE 0:
        PRAMH0    : origin = 0x3f8000, length = 0x001000

    PAGE 1:
        RAMM0     : origin = 0x000000, length = 0x000400
        RAMM1     : origin = 0x000400, length = 0x000400

        /* Peripheral Frame 0 */
        DEV_EMU   : origin = 0x000880, length = 0x000180
        FLASH_REGS: origin = 0x000A80, length = 0x000060
        CSM       : origin = 0x000AE0, length = 0x000010
        XINTF     : origin = 0x000B20, length = 0x000020
        CPU_TIMER0: origin = 0x000C00, length = 0x000008
        CPU_TIMER1: origin = 0x000C08, length = 0x000008
        CPU_TIMER2: origin = 0x000C10, length = 0x000008
        PIE_CTRL  : origin = 0x000CE0, length = 0x000020
        PIE_VECT  : origin = 0x000D00, length = 0x000100

        /* Peripheral Frame 1 */
        ECAN_A    : origin = 0x006000, length = 0x000100
        ECAN_AMBOX: origin = 0x006100, length = 0x000100

        /* Peripheral Frame 2 */
        SYSTEM    : origin = 0x007010, length = 0x000020
        SPI_A     : origin = 0x007040, length = 0x000010
        SCI_A     : origin = 0x007050, length = 0x000010
        XINTRUPT  : origin = 0x007070, length = 0x000010
        GPIOMUX   : origin = 0x0070C0, length = 0x000020
        GPIODAT   : origin = 0x0070E0, length = 0x000020
        ADC       : origin = 0x007100, length = 0x000020
        EV_A      : origin = 0x007400, length = 0x000040
        EV_B      : origin = 0x007500, length = 0x000040
        SPI_B     : origin = 0x007740, length = 0x000010
        SCI_B     : origin = 0x007750, length = 0x000010
        MCBSP_A   : origin = 0x007800, length = 0x000040

        CSM_PWL   : origin = 0x3F7FF8, length = 0x000008
        DRAMH0    : origin = 0x3f9000, length = 0x001000
}

SECTIONS
{
    .reset       : > PRAMH0,       PAGE = 0
    .text        : > PRAMH0,       PAGE = 0
    .cinit       : > PRAMH0,       PAGE = 0
    .stack       : > RAMM1,        PAGE = 1
    .bss         : > DRAMH0,       PAGE = 1
    .ebss        : > DRAMH0,       PAGE = 1
    .const       : > DRAMH0,       PAGE = 1
    .econst      : > DRAMH0,       PAGE = 1
    .sysmem      : > DRAMH0,       PAGE = 1
    .cio         : > DRAMH0,       PAGE = 1

    /* Peripheral Frame 0 registers */
    DevEmuRegsFile   : > DEV_EMU,    PAGE = 1
    FlashRegsFile    : > FLASH_REGS, PAGE = 1
    CsmRegsFile      : > CSM,        PAGE = 1
    XintfRegsFile    : > XINTF,      PAGE = 1
    CpuTimer0RegsFile: > CPU_TIMER0, PAGE = 1
    CpuTimer1RegsFile: > CPU_TIMER1, PAGE = 1
    CpuTimer2RegsFile: > CPU_TIMER2, PAGE = 1
    PieCtrlRegsFile  : > PIE_CTRL,   PAGE = 1
    PieVectTable     : > PIE_VECT,   PAGE = 1

    /* Peripheral Frame 1 registers */
    ECanaRegsFile    : > ECAN_A,     PAGE = 1
    ECanaMboxesFile  : > ECAN_AMBOX, PAGE = 1

    /* Peripheral Frame 2 registers */
    SysCtrlRegsFile  : > SYSTEM,     PAGE = 1
    SpiaRegsFile     : > SPI_A,      PAGE = 1
    SciaRegsFile     : > SCI_A,      PAGE = 1
    XIntruptRegsFile : > XINTRUPT,   PAGE = 1
    GpioMuxRegsFile  : > GPIOMUX,    PAGE = 1
    GpioDataRegsFile : > GPIODAT,    PAGE = 1
    AdcRegsFile      : > ADC,        PAGE = 1
    EvaRegsFile      : > EV_A,       PAGE = 1
    EvbRegsFile      : > EV_B,       PAGE = 1
    ScibRegsFile     : > SCI_B,      PAGE = 1
    McbspaRegsFile   : > MCBSP_A,    PAGE = 1

    CsmPwlFile       : > CSM_PWL,    PAGE = 1
}

After applying these modifications, rebuild the project. The build should complete with zero errors and warnings. Connect the hardware debugger, load the program, and verify execution.