• I2C is a half-duplex protocol that requires open-drain output configuration.
• Due to the weak pull-up effect, higher clock speeds result in slower high-level rise times, so the speed cannot be too fast. Standard mode is 100kHz, and fast mode is 400kHz.
• It supports master-slave and multi-master configurations.
• Data is transmitted with the most significant bit first. For example, when addressing devices like AT24C128/256, which use 16-bit addresses, the address is sent byte by byte, starting with the higher-order bits.
• Start condition (SCL high while SDA goes low): Set SDA high first, then SCL high, followed by pulling SDA low, and finally pulling SCL low.
• Stop condition (SCL high while SDA goes high): Pull SDA low first, then set SCL high, and finally release SDA to high.
• The receiver must take data during the SCL high period. After taking the data, SCL goes low. During SCL high, SDA must not change (data is latched). A transition from low to high triggers a stop condition, while a transition from high to low triggers a start condition.
• During data transfer, if the master needs to handle other tasks (like interrupts), it can actively pull SCL low, pausing the transfer until it resumes.
• When the master receives data, it should release SDA before reading.
• When the master sends data, the slave must acknowledge before the master releases SDA. The acknowledgment is a single bit response from the receiver.
• Sequential read and write operations maintain an address pointer. After each read or write, the pointer increments automatically, so subsequent operations do not require re-specifying the register address.
• If the master does not want to read more, it can send a non-acknowledgment signal. This is typically done when the number of bytes to read is known.

1 if (i != _usSize - 1)//_usSize is the number of bytes to read
2 {
3     i2c_Ack();    /* Generate ACK after reading intermediate bytes (drive SDA = 0) */
4 }
5 else
6 {
7     i2c_NAck();    /* Generate NACK after reading the last byte (drive SDA = 1) */
8 }

• Device presence check

1 uint8_t EEPROMIIC_CheckDevice(uint8_t _Address)
2 {
3     uint8_t ucAck;
4     EEPROMIIC_Start();        /* Send start condition */
5     /* Send device address + read/write bit (0 = write, 1 = read) bit7 first */
6     EEPROMIIC_SendByte(EEPROM_WRITEADDRESS);
7     ucAck = EEPROMIIC_SlaveAck();    /* Check for slave acknowledgment */
8     EEPROMIIC_Stop();            /* Send stop condition */
9     return ucAck;
10}

• I2C theoretically allows up to 127 slaves using 7-bit addressing, but due to bus capacitance limits (not exceeding 400pF), the actual number of slaves is limited to around 8.
• Current address read refers to the address after the last operation. The read operation targets this incremented address without specifying the address explicitly.
• I2C transmission speed depends on the SCL clock frequency.